The present invention relates generally to digital cameras, and more particularly to an image processing system for high performance digital imaging.
Given the rapid advances made in semiconductor technology and digital imaging, it was just a matter of time before digital cameras were developed and introduced. Most digital cameras today are similar in size with and behave similar to conventional photographic cameras. But instead of capturing an image through a lens and recorded onto a photosensitive material as with traditional cameras, digital cameras capture an image using a charge-coupled device (CCD). The composite image is represented by thousands of discrete picture elements, known as pixels. The color of each pixel is given in the form of digital data consisting of binary encoded 1""s and 0""s. This digital data is then processed and stored into memory (e.g., internal flash memory, external memory cards, buffers, etc.) for subsequent use.
By adopting a digital imaging approach, digital cameras offer several advantages over more traditional cameras because the bits of data can now be more readily manipulated using digital signal processing techniques. For instance, the backside of a digital cameras can be equipped with a liquid crystal display (LCD) screen. In a record mode of operation, the LCD acts as a viewfinder in which the LCD displays objects and scenes in real-time. At any time, the user can click to capture the xe2x80x9cpicturexe2x80x9d displayed on the LCD. In a playback mode of operation, pictures can be displayed on the LCD either individually or in groups of four, nine, or sixteen pictures. Users can manually page through the current archive of stored pictures by pressing the appropriate buttons. Furthermore, a user can instantly delete certain pictures. In addition, pictures can be viewed in full size, scaled down in size, or zoomed to larger sizes. Another benefit is that digital cameras can rotate the orientation of the pictures so as to automatically switch between landscape versus portrait formats. A common feature found in many digital cameras is a burst mode of operation, whereby a single click of a button can cause the camera to take several pictures in rapid succession, thereby creating a film-like sequence of images.
Due to their digital nature and in order to offer these advanced features, modern digital cameras were typically designed using specialized circuitry to handle each of the advanced features. Although this approach makes digital cameras relatively fast, it dramatically increases the overall cost, size, battery consumption, and weight of the digital cameras. In addition, the captured image display might appear to be slightly different than a live-view display if one were to use different circuits and data paths.
One solution to these drawbacks is to couple a generic processor to memory via a bus, where the processor is programmed to perform all of the enhanced functionality""s, and digital data is shuttled between the memory and processor via the bus. However, this approach suffers from one major drawback; it is relatively slow. When a user presses a button, he or she expects instant feedback and response. The user does not want to wait the number of seconds it takes to process an image. It has been discovered that the software approach is slow because it primarily suffers from two disadvantages. First, because the advanced features are typically performed by software, it can take a long time to configure and execute the requisite programming steps. Second, the bus speed becomes a limiting factor as large amounts of data need to be transferred between the processor and memory. Essentially, the bus becomes overloaded. The end result is that software-based digital cameras may be too slow to suit the tastes of consumers, depending on the processor/bus combination.
Thus, there is a need for an advanced architecture which facilitates high-speed image processing, offers advanced features, and yet is cost-effective. The present invention provides a novel solution by implementing a special hardware configuration which has been optimized for increased speed. Certain parts and paths of the circuit are reused and shared so as to leverage existing resources with minimal impact on its speed and functionality. By sharing certain resources, duplication is reduced, thereby decreasing costs. Furthermore, the present invention is adaptable to be used in virtually any type of digital camera and CCD array.
The present invention pertains to an image processing system for high performance digital imaging in digital cameras and the like. The reflected light from an image is focused through a lens and optically filtered. A CCD array converts this image into an electrical signal. This electrical signal is processed and then converted into an equivalent digital signal. A digital signal processor (DSP) is then used to process the raw digital signal. The DSP includes a capture data path, a data flow control, an image processing data path, a compression/decompression engine, a resize circuit, a display processing circuit, and a rotation circuit. Data from the CCD is routed to the capture data path for processing. The processed data is then sent over a main bus to be stored in an input buffer. The data flow control finds the appropriate image data for retrieval. Further processing is performed (e.g., decompressing, line averaging, pixel shuffling, ring insertion, interpolation, edge enhancement, gamma correction, and color space conversion). A JPEG compression/decompression engine compresses the resulting image before it is stored as a file. The JPEG engine can subsequently decompress a file for display. The uncompressed file can first be resized to suit the desire of the user and/or rotated, depending on the current physical orientation of the digital camera and that of the image.
By selectively activating and reusing certain parts of the hardware architecture and various data paths, at least four modes of operation can be supported: live view, capture, instant review, and play mode. In a live view mode of operation, the image from the capture data path is stored in the input buffer of the memory, retrieved and processed by the image processing path, buffered, resized if necessary, and displayed along with any appropriate graphics. In a capture mode of operation, the image from the capture data path is stored in the input buffer of the memory, retrieved and processed by the image processing path, buffered, compressed by the JPEG engine, and stored in a file format. And in an instant review mode of operation, the image from the capture data path is simultaneously resized, if necessary, stored in a display buffer, and displayed along with any appropriate graphics. Lastly, in a playback mode of operation, one or more requested image files are read, decompressed, resized if necessary, and displayed along with any appropriate graphics (e.g., padding or overlay bars).
An orientation detector is used to detect the current physical orientation of the display device so that the image from a first draw buffer can be rotated by the rotation circuit, in accordance with the current orientation, and stored in a second draw buffer. The correct image is automatically displayed in all modes, regardless of the orientation of the image or the physical orientation of the camera (both at the time the picture was taken and at the time the picture is being rendered for display).
By utilizing the optimized hardware design and data paths of the present invention, faster image processing can be achieved with a wide range of features, modes of operation, and enhancements. Furthermore, with the novel layout of the hardware design and data paths of the present invention, certain parts and paths can be used in different capacities and in different modes of operation. This reduces the total amount of hardware which is needed, which minimizes the overall cost with minimal or no impact on speed and functionality.